(57) Abstract The EDC/CRC checker (70), while 1 data blocks are correction during correction pass, continuing to block correction by checking EDC/CRC, it makes that it accesses the buffer EDC/CRC as a purpose unnecessary. During correction pass, the sum of EDC/CRC accumulation. As for the sum, after pass of the block completes, it is verified, that if that block correction by the EDC/CRC byte in that block it becomes zero. It is not correction during correction pass of one time of block, the byte of the most recent code word, is added to the sum accumulation. Before by the byte of the most recent code word and the relation of byte synchronization being, the byte of code word (is necessary) correction, at the same time when (correction is done, although) correction the byte of code word of the time before, also the error pattern coefficient which includes the error pattern which is used and are added in the sum accumulation. With the execution configuration which is explained here, relation of the conceptual attaching block, byte synchronization, when the byte which is not correction accumulation, it is something which correction that tries is done vis-a-vis the byte to which code word of time before the following corresponds as possesses the multiple code word columns. With various execution configurations of this invention, it becomes possible to manipulate multiple code words simultaneously.
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