Semiconductor memory device having gate electrode, drain-drain contact, and drain-gate contact layers

摘要

The drain of a drive transistor Q₃ and the drain of a load transistor Q₅ are connected by a first drain—drain contact layer. The drain of a drive transistor Q₄ and the drain of a load transistor Q₆ are connected by a second drain—drain contact layer. The gate electrodes of the drive transistor Q₃ and the load transistor Q₅ (a first gate electrode layer) are connected to the second drain—drain contact layer by a first drain-gate contact layer. The gate electrodes of the drive transistor Q₄ and the load transistor Q₆ (a second gate electrode layer) are connected to the first drain—drain contact layer by a second drain-gate contact layer.