首页> 外国专利> METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A IMPURITY LAYER DISPOSED BETWEEN A NON-DOPED SILICON FILM AND HIGH MELTING-POINT METAL FILM FOR REDUCING SOLID STATE REACTION BETWEEN SAID HIGH MELTING-POINT METAL FILM AND POLYCRYSTAL SILICON FILM

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A IMPURITY LAYER DISPOSED BETWEEN A NON-DOPED SILICON FILM AND HIGH MELTING-POINT METAL FILM FOR REDUCING SOLID STATE REACTION BETWEEN SAID HIGH MELTING-POINT METAL FILM AND POLYCRYSTAL SILICON FILM

机译:用于制造具有在不掺杂的硅膜和高熔点金属膜之间布置的杂质层的半导体器件的方法,以减少所述高熔点金属膜和多晶硅膜之间的固态反应

摘要

A semiconductor device has a semiconductor substrate and a conductive layer formed above the semiconductor substrate. The conductive layer has a silicon film, a silicide film formed on the silicon film, and a high melting-point metal film formed on the silicide film. The silicon film has a non-doped layer, which does not contain impurities, and an impurity layer which is formed on the non-doped layer and contains impurities. The silicide film is formed on the impurity layer of the silicon film.
机译:半导体器件具有半导体衬底和形成在半导体衬底上方的导电层。导电层具有硅膜,在该硅膜上形成的硅化物膜以及在该硅化物膜上形成的高熔点金属膜。硅膜具有不包含杂质的非掺杂层和形成在该非掺杂层上且包含杂质的杂质层。硅化物膜形成在硅膜的杂质层上。

著录项

  • 公开/公告号US6596567B1

    专利类型

  • 公开/公告日2003-07-22

    原文格式PDF

  • 申请/专利权人 UNITED MICROELECTRONICS CORPORATION;

    申请/专利号US20000710883

  • 发明设计人 HIROTOMO MIURA;

    申请日2000-11-14

  • 分类号H01L213/35;H01L213/36;

  • 国家 US

  • 入库时间 2022-08-22 00:06:03

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