SELF-SYNCHRONIZATION LOGIC CIRCUIT HAVING TEST CIRCUIT AND METHOD OF TESTING SELF-SYNCHRONIZATION LOGIC CIRCUIT

摘要

PROBLEM TO BE SOLVED: To facilitate a test through a simple arrangement. ;SOLUTION: The self-synchronization logic circuit is provided with scan test registers 104-106 constituting a pipe line while retaining data, and scan test self-synchronization control circuits 101-103 for transferring a clock by performing 4-way hand-shake with each register, and progresses data processing among the scan test registers 104-106 according to a clock transferred from the scan test self-synchronization control circuit. The scan test register 104-106 has a function for transferring the content of data processing in serial at the time of test, in addition to the function of normal data processing. The scan test self-synchronization control circuit 101-103 is set in such a state as handshake ends before third way at the time of test.;COPYRIGHT: (C)2004,JPO