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METHOD FOR INSERTING TEST POINTS FOR LOGIC CIRCUITS AND LOGIC CIRCUIT TESTING APPARATUS
METHOD FOR INSERTING TEST POINTS FOR LOGIC CIRCUITS AND LOGIC CIRCUIT TESTING APPARATUS
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机译:插入逻辑电路测试点的方法和逻辑电路测试装置
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摘要
This invention is intended to insert test points in a logic circuit under test in an effective manner. The logic circuit testing apparatus includes a fault estimation unit that estimates fault likelihoods for each of signal lines in a logic circuit in accordance with wiring conditions obtained from design data for the logic circuit. The logic circuit testing apparatus also includes an insertion unit that inserts test points, based on the fault likelihoods. The logic circuit testing apparatus executes testing the logic circuit in which the test points were inserted by the insertion unit.
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