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Methods of forming trench isolated integrated circuit devices including grooves, and trench isolated integrated circuit devices so formed

机译:形成包括沟槽的沟槽隔离集成电路器件的方法以及如此形成的沟槽隔离集成电路器件

摘要

Trench isolated integrated circuit devices are fabricated by forming a trench including sidewalls in an integrated circuit substrate, and forming a lower device isolation layer in the trench and extending onto the trench sidewalls. The lower device isolation layer includes grooves therein, a respective one of which extends along a respective one of the sidewalls. An upper device isolation layer is formed on the lower device isolation layer and in the grooves. Trench isolated integrated circuit devices include an integrated circuit substrate including a trench having sidewalls and a lower device isolation layer in the trench and extending onto the trench sidewalls. The lower device isolation layer includes grooves therein, a respective one of which extends along a respective one of the sidewalls. An upper device isolation layer is provided on the lower device isolation layer and in the grooves.
机译:通过在集成电路衬底中形成包括侧壁的沟槽,并在沟槽中形成下部器件隔离层并延伸到沟槽侧壁上,来制造沟槽隔离集成电路器件。下部器件隔离层在其中包括凹槽,凹槽中的相应一个沿着侧壁中的相应一个延伸。上器件隔离层形成在下器件隔离层上和凹槽中。沟槽隔离的集成电路器件包括集成电路衬底,该集成电路衬底包括具有侧壁的沟槽和在沟槽中并延伸到沟槽侧壁上的下部器件隔离层。下部器件隔离层在其中包括凹槽,凹槽中的相应一个沿着侧壁中的相应一个延伸。上器件隔离层设置在下器件隔离层上和凹槽中。

著录项

  • 公开/公告号US2004072408A1

    专利类型

  • 公开/公告日2004-04-15

    原文格式PDF

  • 申请/专利权人 YUN JAE-SUN;SHIN JIN-HYUN;

    申请/专利号US20030601937

  • 发明设计人 JAE-SUN YUN;JIN-HYUN SHIN;

    申请日2003-06-24

  • 分类号H01L21/76;

  • 国家 US

  • 入库时间 2022-08-21 23:19:25

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