Semiconductor product wafer having vertically and horizontally arranged patterned areas including a limited number of test element group regions

摘要

A plurality of patterned areas is arranged vertically and horizontally with fixed pitches on a surface of a semiconductor product wafer. The patterned areas include a plurality of first patterned areas and at least one second patterned area. The first patterned area includes a device region, and the second patterned area includes a portion of the device region and a Test Element Group (TEG) region.