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Method of fabricating vias in solder pads of a ball grid array (BGA) substrate

机译:在球栅阵列(BGA)基板的焊盘中制造通孔的方法

摘要

Disclosed is a method for fabricating vias in solder pads of a ball grid array (BGA) substrate. The substrate is drilled to form the plural vias, and then the interior surfaces of said vias are plated with a copper layer for forming the electrically conductive vias. After the high solid content of the resin is adopted for being plugged into the electrically conductive vias, the both ends of the electrically conductive vias and the upper surface and the lower surface of the substrate are plated with a copper layer. Then said copper layers are etched to form the upper circuit layer and the lower circuit layer and the solder pads. The method in present invention can increase the density of the circuits. Because the both ends of the electrically conductive vias plugged with the resin are very planar, it can be made use of forming a core layer for the built-up fabrication.
机译:公开了一种在球栅阵列(BGA)基板的焊盘中制造通孔的方法。在基板上钻孔以形成多个通孔,然后在所述通孔的内表面镀铜层以形成导电通孔。在采用高固含量的树脂插入导电通孔中之后,在导电通孔的两端以及基板的上表面和下表面镀铜层。然后,蚀刻所述铜层以形成上电路层和下电路层以及焊盘。本发明的方法可以增加电路的密度。因为插入树脂的导电通孔的两端都非常平整,所以可以利用其形成芯层来进行组合制造。

著录项

  • 公开/公告号US6649506B2

    专利类型

  • 公开/公告日2003-11-18

    原文格式PDF

  • 申请/专利权人 PHOENIX PRECISION TECHNOLOGY CORPORATION;

    申请/专利号US20010939480

  • 发明设计人 SHIH-PING HSU;

    申请日2001-08-24

  • 分类号H01L214/40;

  • 国家 US

  • 入库时间 2022-08-21 23:13:49

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