Integrated circuit occasional write / read memory

摘要

The present invention relates to methods and apparatus for mapping spare columns to defective columns in a fabricated random access memory (RAM). The defective columns correspond to improperly fabricated bit lines in the RAM and spare columns are fabricated on the RAM to replace any defective columns. Particular arrays of columns in the RAM are accessed through a corresponding input/output device. A defective column in an array is bypassed by a column redundancy scheme that allows a spare column to be mapped to more than one array of columns. Thus, a plurality of spare columns may be mapped to each array of columns. Since the total number of spare columns may be less than the total number of column arrays, the present invention provides a saving over the prior art which requires one spare column for each column array.