首页> 外国专利> METHOD OF FORMING GATE SPACER OF SEMICONDUCTOR DEVICE TO SECURE LINE WIDTH OF GATE SPACER AND INCREASE UNIFORMITY TO SUBSTRATE LOSS

METHOD OF FORMING GATE SPACER OF SEMICONDUCTOR DEVICE TO SECURE LINE WIDTH OF GATE SPACER AND INCREASE UNIFORMITY TO SUBSTRATE LOSS

机译:形成半导体器件的栅极间隔以确保栅极间隔的线宽并增加均匀度以消除损耗的方法

摘要

Purpose: a kind of method for the gate spacer being used to form semiconductor device is arranged to increase uniformity to the substrate loss of the cumulative etch selectivity by a nitride layer, white layer in the method for etching one second oxidation film. Construction: providing semi-conductive substrate (21), has one (25). One first oxide layer, a nitride layer, white layer and one second oxidation film are sequentially deposited on a semiconductor substrate, have door. First gasket (29) is formed by etching the second oxidation film. It is etched by using the first gasket as a mask, nitride layer, white layer and the first oxide layer. Second gasket (30) and third gasket (31) are formed by etching nitride layer, white layer and the first oxide layer.
机译:目的:布置一种用于形成半导体器件的栅极间隔物的方法,以增加用于蚀刻一个第二氧化膜的方法中氮化物层,白色层对衬底的累积蚀刻选择性的损失的均匀性。结构:提供半导体衬底(21),具有一个(25)。一个第一氧化物层,一个氮化物层,白色层和一个第二氧化膜顺序地沉积在半导体衬底上,并具有门。通过蚀刻第二氧化膜来形成第一衬垫(29)。通过使用第一垫片作为掩模,氮化物层,白色层和第一氧化物层来蚀刻它。第二垫片(30)和第三垫片(31)通过蚀刻氮化物层,白色层和第一氧化物层而形成。

著录项

  • 公开/公告号KR20050011480A

    专利类型

  • 公开/公告日2005-01-29

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20030050612

  • 发明设计人 KIM SEUNG BUM;CHO SUNG YOON;

    申请日2003-07-23

  • 分类号H01L21/336;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:54

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