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SEMICONDUCTOR MEMORY DEVICE HAVING MASK FRIENDLINESS, PHOTOLITHOGRAPHY FRIENDLINESS AND IMPROVED ELECTRICAL CHARACTERISTIC TO IMPROVE PERFORMANCE OF MEMORY CELL TRANSISTOR AND MARGIN OF DESIGN RULE
SEMICONDUCTOR MEMORY DEVICE HAVING MASK FRIENDLINESS, PHOTOLITHOGRAPHY FRIENDLINESS AND IMPROVED ELECTRICAL CHARACTERISTIC TO IMPROVE PERFORMANCE OF MEMORY CELL TRANSISTOR AND MARGIN OF DESIGN RULE
PURPOSE: A semiconductor memory device having a mask friendliness, photolithography friendliness and an improved electrical characteristic is provided to improve the performance of a memory cell transistor and a margin of a design rule by increasing an overlapped region of a wordline and an active region by 40 percent. CONSTITUTION: A plurality of the first rows are composed of a plurality of active regions that are disposed by a predetermined pitch. Only a part of a plurality of the second rows is shifted in the row direction to overlap the active regions of the first rows, and the plurality of the second rows are composed of a plurality of the active regions that are disposed by the predetermined pitch. The first rows and the second rows are alternatively arranged. The intervals between each active region and six active regions adjacent to each active region are the same.
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