Integrated circuit including a high voltage LDMOS device and low voltage devices

摘要

An integrated circuit includes a high voltage LDMOS device and a low voltage device. The LDMOS device includes a lightly doped p-well as the drift region of the drain terminal while low voltage devices are built using standard, more heavily doped p-wells. By using a process including a lightly doped p-well and a standard p-well, high and low voltage devices can be integrated onto the same integrated circuit. In one embodiment, the lightly doped p-well and the standard p-well are formed by performing ion implantation using a first dose to form the lightly doped p-well, masking the lightly doped p-well, and performing ion implantation using a second dose to form the standard p-well. The second dose is the difference of the dopant concentrations of the lightly doped p-well and the standard p-well. In other embodiments, other high voltage devices can also be built by incorporating the lightly doped p-well structure.