首页>
外国专利>
Method and structure to use an etch resistant liner on transistor gate structure to achieve high device performance
Method and structure to use an etch resistant liner on transistor gate structure to achieve high device performance
展开▼
机译:在晶体管栅极结构上使用抗蚀刻衬垫以实现高器件性能的方法和结构
展开▼
页面导航
摘要
著录项
相似文献
摘要
An etch resistant liner covering sidewalls of a transistor gate stack and along a portion of the substrate at a base of the transistor gate stack. The liner prevents silicide formation on the sidewalls of the gate stack, which may produce electrical shorting, and determines the location of silicide formation within source and drain regions within the substrate at the base of the transistor gate stack. The liner also covers a resistor gate stack preventing silicide formation within or adjacent to the resistor gate stack.
展开▼