首页>
外国专利>
Substrate-biased I/O and power ESD protection circuits in deep-submicron twin-well process
Substrate-biased I/O and power ESD protection circuits in deep-submicron twin-well process
展开▼
机译:深亚微米双阱工艺中的衬底偏置I / O和电源ESD保护电路
展开▼
页面导航
摘要
著录项
相似文献
摘要
A semiconductor device which includes a P-well which is underneath NMOS fingers. The device includes an N-well ring which is configured so that the inner P-well underneath the NMOS fingers is separated from an outer P-well. The inner P-well and outer P-well are connected by a P-substrate resistance which is much higher than the resistance of the P-wells. A P+-diffusion ring surrounding the N-well ring is configured to connect to VSS, i.e., P-taps.
展开▼