首页> 外国专利> SEMICONDUCTOR DEVICE WITH SOLID PHASE EPITAXY SILICON BY DOUBLE LAYER FOR PAD PLUG AND METHOD FOR FABRICATING THE SAME

SEMICONDUCTOR DEVICE WITH SOLID PHASE EPITAXY SILICON BY DOUBLE LAYER FOR PAD PLUG AND METHOD FOR FABRICATING THE SAME

机译:具有用于填塞的双层固相表位硅的半导体器件及其制造方法

摘要

SUMMARY OF THE INVENTION The present invention provides a semiconductor device and a method of manufacturing the same, in which a plug material having a good breakdown voltage characteristics and easy to shallow junctions and a low resistance value is applied. The contact plug forming method of the present invention provides a bonding layer of a semiconductor substrate. Forming a contact hole exposing the contact hole, depositing a relatively low concentration of a first solid phase epitaxy (SPE) silicon film along the surface of the contact hole, and a relatively high concentration of the second SPE silicon on the first SPE silicon film Depositing a film, etching the deposited first and second SPE silicon films so that only a pad plug remains, and forming a metal plug on the first and second SPE silicon films in the contact hole; The invention improves the margin of semiconductor device design and keeps device characteristics stable, reduces contact resistance, and improves device reliability and yield. It can be effective.;Cell Contact, SPE, Plug, Epitaxial Silicon
机译:发明内容本发明提供了一种半导体器件及其制造方法,其中应用了具有良好的击穿电压特性并且易于浅结和低电阻值的插塞材料。本发明的接触塞形成方法提供了半导体基板的接合层。形成暴露接触孔的接触孔,沿接触孔的表面沉积相对较低浓度的第一固相外延(SPE)硅膜,并在第一SPE硅膜上沉积相对较高浓度的第二SPE硅膜,蚀刻沉积的第一和第二SPE硅膜,使得仅保留衬垫塞,并在接触孔中的第一和第二SPE硅膜上形成金属塞。本发明提高了半导体器件设计的余量,保持了器件特性的稳定,减小了接触电阻,并提高了器件的可靠性和成品率。它可以有效。;电池触点,SPE,插头,外延硅

著录项

  • 公开/公告号KR100605585B1

    专利类型

  • 公开/公告日2006-07-20

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20050053108

  • 发明设计人 LEE YOUNG HO;

    申请日2005-06-20

  • 分类号H01L21/28;

  • 国家 KR

  • 入库时间 2022-08-21 21:23:19

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