首页> 外国专利> Semiconductor memory device and memory embedded logic LSI

Semiconductor memory device and memory embedded logic LSI

机译:半导体存储器件和存储器嵌入式逻辑LSI

摘要

PROBLEM TO BE SOLVED: To enable the operation of a row/column simultaneous access function with a small number of pins like at a time when addresses are multiplexed. SOLUTION: Whether an address signal is to be outputted to a row decoding circuit 12 or not is selected by a selector 14 and whether the address signal is to be outputted to a column decoding circuit 13 or not is selected by a selector 17. The address signal to be inputted to an external terminal is stored in a latch circuit 15 and, moreover, either the address signal to be inputted to the external terminal or the address signal stored in the latch circuit 15 is selected by a multiplexer 16 to be outputted to either the selector 14 or the selector 7. Then, when a command for simultaneously inputting the address signal to the row decoding circuit 12 and the column decoding circuit 13 is inputted to a command generating circuit 18, the signal stored in the latch 15 is selected in the multiplexer 16 to be outputted and also the sectectors 12, 17 are set to output states.
机译:解决的问题:启用行/列同时访问功能时,需要使用少量的引脚,例如在地址多路复用时。解决方案:选择器14选择是否将地址信号输出到行解码电路12,选择器17选择是否将地址信号输出到列解码电路13。要输入到外部端子的信号被存储在锁存电路15中,此外,要被输入到外部端子的地址信号或被存储在锁存电路15中的地址信号被多路复用器16选择以输出到选择器14或选择器7中的任何一个。然后,当用于将地址信号同时输入到行解码电路12和列解码电路13的命令输入到命令生成电路18时,选择存储在锁存器15中的信号。在多路复用器16中将要输出的信号,并且将分割器12、17设置为输出状态。

著录项

  • 公开/公告号JP3872922B2

    专利类型

  • 公开/公告日2007-01-24

    原文格式PDF

  • 申请/专利权人 株式会社東芝;

    申请/专利号JP19990181688

  • 发明设计人 武田 悟;福田 良;佐藤 勝彦;

    申请日1999-06-28

  • 分类号G11C11/401;G11C29/12;

  • 国家 JP

  • 入库时间 2022-08-21 21:07:53

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号