首页> 外国专利> In the single bit and have multiplex bit mode the non-volatile semiconductor memory device and its programming movement and the read-out operational mannered null

In the single bit and have multiplex bit mode the non-volatile semiconductor memory device and its programming movement and the read-out operational mannered null

机译:在单个位并具有多路复用位模式下,非易失性半导体存储器件及其编程动作和读出操作方式为空

摘要

A nonvolatile memory having a memory field and a redundant field within a single semiconductor chip is disclosed. The memory field is provided to store normal data and the redundant field is provided to store essential device data. The nonvolatile memory includes a plurality of first page buffers performing a multi-bit reading operation for the memory field and a plurality of second page buffers performing a regular single-bit operation for the redundant field. A time period of the regular single-bit operation for the redundant field is shorter than that of the multi-bit operation for the memory field. The nonvolatile semiconductor memory of the invention is therefore capable of performing single-bit operation at a higher speed than the conventional nonvolatile semiconductor memories each having the single- and multi-bit operation modes, improving their performance.
机译:公开了在单个半导体芯片内具有存储字段和冗余字段的非易失性存储器。提供存储字段以存储常规数据,并提供冗余字段以存储基本设备数据。非易失性存储器包括对存储字段执行多位读取操作的多个第一页面缓冲器和对冗余字段执行常规的一位操作的多个第二页面缓冲器。冗余字段的常规单位操作的时间段短于存储字段的多位操作的时间段。因此,本发明的非易失性半导体存储器能够以比分别具有单位和多位操作模式的常规非易失性半导体存储器更高的速度执行单位操作,从而提高了它们的性能。

著录项

  • 公开/公告号JP3877462B2

    专利类型

  • 公开/公告日2007-02-07

    原文格式PDF

  • 申请/专利权人 三星電子株式会社;

    申请/专利号JP19990102950

  • 发明设计人 劉 泰和;

    申请日1999-04-09

  • 分类号G11C16/02;G11C16/04;G11C16/06;

  • 国家 JP

  • 入库时间 2022-08-21 21:07:29

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