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Integrated Circuit having fine-pitch Pads, and Probe card and method for testing the

机译:具有小间距焊盘的集成电路,探针卡和测试方法

摘要

invention is a wafer-level test of the efficiency of the increased cost of the test can be reduced in an integrated circuit chip , the probe card and provides a test method . And spaced from a plurality of output pads and the output pads are arranged in line integrated circuit comprises a plurality of input pads arranged to at least correspond to the two output pads . Includes a plurality of first check tip and a plurality of second test probe tip card for testing the electrical characteristics of the integrated circuit chip is arranged on a printed circuit board and can check more than one chip at the same time .
机译:本发明是一种晶圆级测试效率的增加,该测试成本可以减少在集成电路芯片,探针卡中提供的测试方法。并且与多个输出焊盘间隔开并且输出焊盘布置成线状,集成电路包括多个输入焊盘,所述多个输入焊盘布置成至少对应于两个输出焊盘。在印刷电路板上布置有包括用于测试集成电路芯片的电特性的多个第一检查尖端和多个第二测试探针尖端卡,并且可以同时检查一个以上的芯片。

著录项

  • 公开/公告号KR20070017788A

    专利类型

  • 公开/公告日2007-02-13

    原文格式PDF

  • 申请/专利权人 삼성전자주식회사;

    申请/专利号KR20050072375

  • 发明设计人 최민석;

    申请日2005-08-08

  • 分类号H01L21/66;

  • 国家 KR

  • 入库时间 2022-08-21 20:36:55

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