首页> 外国专利> INTEGRATED DRAM MEMORY CIRCUIT, ROW ADDRESS CIRCUIT, AND METHOD FOR GENERATING ROW ADDRESS BY REFRESHING ROW CONTROL CIRCUIT AND DRAM MEMORY

INTEGRATED DRAM MEMORY CIRCUIT, ROW ADDRESS CIRCUIT, AND METHOD FOR GENERATING ROW ADDRESS BY REFRESHING ROW CONTROL CIRCUIT AND DRAM MEMORY

机译:集成的DRAM存储器电路,行地址电路以及通过刷新行控制电路和DRAM存储器来产生行地址的方法

摘要

PROBLEM TO BE SOLVED: To overcomes a drawback of an integrated circuit memory where the enable of a row selection circuit is delayed until appropriate address source is determined.;SOLUTION: The circuit and method for the integrated circuit memory, at least one cycle before actual internal refresh operation is performed, a look-ahead function that provides a refresh command to a device is incorporated. An active cycle is executed at the same clock as a clock at which an external command is applied. The active command is not changed but executed in the same clock cycle as generation of the active command. The active command can be executed immediately without waiting for determination as to whether a line address latch should be supplied externally or internally.;COPYRIGHT: (C)2008,JPO&INPIT
机译:解决的问题:为了克服集成电路存储器的缺点,在该存储器中,行选择电路的使能被延迟直到确定适当的地址源为止;解决方案:用于集成电路存储器的电路和方法,至少要在实际使用前一个周期内部刷新操作被执行,并结合了向设备提供刷新命令的超前功能。有效周期与施加了外部命令的时钟在同一时钟执行。活动命令不会更改,但会在与活动命令生成相同的时钟周期内执行。可以立即执行活动命令,而不必等待确定是应从外部还是从内部提供线地址锁存器。;版权所有:(C)2008,JPO&INPIT

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