首页> 外国专利> The n channel and the p channel MOS device for the thin epitaxial RESURF integrated circuit null high tension where it includes the HVp channel and the n channel

The n channel and the p channel MOS device for the thin epitaxial RESURF integrated circuit null high tension where it includes the HVp channel and the n channel

机译:用于薄外延RESURF集成电路的n沟道和p沟道MOS器件为零高张力,其中它包括HVp沟道和n沟道

摘要

N-channel LDMOS and p-channel MOS devices for high voltage integrated in a BiCMOS integrated circuit and exploiting a RESURF condition are provided with a buried region of the same type of conductivity of the epitaxial layer and a doping level intermediate between the doping level of the epitaxial layer and of a source or drain region, respectively, of the high voltage complementary MOS devices. The devices may be configured as source or drain followers without problems. IMAGE
机译:集成在BiCMOS集成电路中并利用RESURF条件的用于高压的N沟道LDMOS和p沟道MOS器件具有外延层的电导率相同类型的掩埋区和介于掺杂剂的掺杂水平之间的掺杂水平。高电压互补MOS器件的外延层和源极或漏极区。可以毫无问题地将器件配置为源极或漏极跟随器。 <图像>

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