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CIRCUIT WITH FUSE/ANTI-FUSE TRANSISTOR WITH SELECTIVELY DAMAGED GATE INSULATING LAYER
CIRCUIT WITH FUSE/ANTI-FUSE TRANSISTOR WITH SELECTIVELY DAMAGED GATE INSULATING LAYER
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机译:带有保险丝/反保险丝晶体管的电路,带有选择性损坏的门绝缘层
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摘要
A semiconductor integrated circuit is disclosed which includes a main transistor and at least one of a fuse transistor or an anti-fuse transistor (“fuse/anti-fuse transistor”). Each transistor type includes an active region formed in a semiconductor substrate, a gate stack comprising a gate insulation layer and a gate electrode sequentially formed on the active region, and source/drain regions separated across the gate stack, but the gate insulation layer of the fuse/anti-fuse transistor is selectively damaged during fabrication.
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