Timer based stall avoidance mechanism for high speed wireless communication system

摘要

This invention uses timers at the transmitter to track its sending data blocks to improve the timer-based stall avoidance mechanism of the prior art. Moreover, the invention uses a multi-timer mechanism to manage reordering buffers at the receiver. The multi-timer mechanism provides the receiver with one timer per reorder buffer, or uses one timer per missing data block, or uses one timer per missing data block but a gap of consecutive TSN missing data blocks can share one timer. The multi-timer mechanism can effectively track the missing blocks and monitor the reorder delivery process for all reordering buffers.