首页> 外国专利> USE OF F-BASED GATE ETCH TO PASSIVATE THE HIGH-K/METAL GATE STACK FOR DEEP SUBMICRON TRANSISTOR TECHNOLOGIES

USE OF F-BASED GATE ETCH TO PASSIVATE THE HIGH-K/METAL GATE STACK FOR DEEP SUBMICRON TRANSISTOR TECHNOLOGIES

机译:使用基于F的栅极蚀刻来钝化深亚微米晶体管技术的高K /金属栅极堆叠

摘要

A new, effective and cost-efficient method of introducing Fluorine into Hf-based dielectric gate stacks of planar or multi-gate devices (MuGFET), resulting in a significant improvement in both Negative and Positive Bias Temperature Instabilities (NBTI and PBTI) is provided. The new method uses an SF6 based metal gate etch chemistry for the introduction of Fluorine, which after a thermal budget within the standard process flow, results in excellent F passivation of the interfaces. A key advantage of the method is that it uses the metal gate etch for F introduction, requiring no extra implantations or treatments. In addition to the significant BTI improvement with the novel method, a better Vth control and increased drive current on MuGFET devices is achieved.
机译:提供了一种新的,有效且具有成本效益的方法,可以将氟引入平面或多栅极器件(MuGFET)的基于Hf的介电栅极叠层中,从而显着改善了负和正偏置温度不稳定性(NBTI和PBTI) 。该新方法使用基于SF 6 的金属栅极蚀刻化学试剂引入氟,在标准工艺流程中达到热预算后,氟可很好地钝化界面。该方法的主要优点是它使用金属栅极蚀刻进行F引入,不需要额外的注入或处理。除了使用该新方法显着改善BTI之外,还可以在MuGFET器件上实现更好的V 控制和增加的驱动电流。

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