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Method for manufacturing a floating-gate memory with high- and low-voltage transistors
Method for manufacturing a floating-gate memory with high- and low-voltage transistors
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机译:用高低压晶体管制造浮栅存储器的方法
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摘要
The invention comprises an integrated circuit (100) including integral high and low-voltage peripheral transistors and a method for making the integrated circuit. In one aspect of the invention, a method of integrating high and low voltage transistors into a floating gate memory array comprises the steps of forming a tunnel oxide layer (24) outwardly from a semiconductor substrate (116), forming a floating gate layer (26) disposed outwardly from the tunnel oxide layer (24) and forming an insulator layer (28) disposed outwardly from the floating gate layer (26) to create a first intermediate structure. The method further includes the steps of masking a first region (114) and a second region (110) of the first intermediate structure leaving a third region (112) unmasked, removing at least a portion of the insulator layer (28), the floating gate layer (26) and the tunnel oxide layer (24) from the third region (112) and forming a first dielectric layer (42) disposed outwardly from the substrate (116) in a region approximately coextensive with the third region (112). The second region (110) and the third region (112) are masked, leaving the first region (114) unmasked. Then, at least a portion of the insulator layer (28), the floating gate layer (26) and the tunnel oxide layer (24) is removed from the first region (114) . A second dielectric layer (44) is formed outwardly from the substrate (116) and the first dielectric layer (42) in a region approximately coextensive with the first region (114) and the third regions (112), respectively.
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