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HIGH VOLTAGE SOI CMOS DEVICE AND METHOD OF MANUFACTURE
HIGH VOLTAGE SOI CMOS DEVICE AND METHOD OF MANUFACTURE
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机译:高压SOI CMOS器件及其制造方法
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摘要
A high voltage FET and process for fabricating such an FET are provided. An extended drain and thick gate oxide device design is implemented in a basic CMOS structure to enable higher operating voltages. The basic concept of the invention is well suited for the body-tie architecture often utilized in this technology and is also applicable to other SOI processes using similar isolation schemes.
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