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Dual port SRAM with dedicated read and write ports for high speed read operation and low leakage

机译:具有专用读写端口的双端口SRAM,可实现高速读取操作和低泄漏

摘要

A dual port static random access memory (SRAM) having dedicated read and write ports provides high speed read operation with reduced leakages. The dual port SRAM includes at least one write word line, at least one read word line, at least one pair of write bit line and read bit line, a plurality of rows and columns. Each rows and column has at least one cell which includes at least one pair of memory elements cross-coupled to form a latch for storing data, a pair of write access semiconductors and a pair of read access semiconductors. The SRAM includes an inverter circuit and a pull down circuit which are operatively coupled to the at least one cell to increase read operation performance and eliminate leakage.
机译:具有专用读取和写入端口的双端口静态随机存取存储器(SRAM)提供了高速读取操作,同时减少了泄漏。双端口SRAM包括至少一条写字线,至少一条读字线,至少一对写位线和读位线,多行和多列。每行和每列具有至少一个单元,该单元包括至少一对交叉耦合以形成用于存储数据的锁存器的存储元件,一对写访问半导体和一对读访问半导体。 SRAM包括反相器电路和下拉电路,其可操作地耦合到至少一个单元以增加读取操作性能并消除泄漏。

著录项

  • 公开/公告号US7813161B2

    专利类型

  • 公开/公告日2010-10-12

    原文格式PDF

  • 申请/专利权人 YOGESH LUTHRA;

    申请/专利号US20070847119

  • 发明设计人 YOGESH LUTHRA;

    申请日2007-08-29

  • 分类号G11C13/00;

  • 国家 US

  • 入库时间 2022-08-21 18:53:28

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