首页> 外国专利> Integrated circuit having laterally dielectrically isolated active regions above an electrically contacted buried material, and method for producing the same

Integrated circuit having laterally dielectrically isolated active regions above an electrically contacted buried material, and method for producing the same

机译:具有在电接触的掩埋材料上方的横向介电隔离的有源区的集成电路及其制造方法

摘要

An integrated circuit is disclosed that includes a first layer made of active semiconductor material and extending along a first side of a buried layer, and trench structures, which cut through the layer made of active semiconductor material and have dielectric wall regions, whereby the dielectric wall regions isolate electrically subregions of the layer, made of active semiconductor material in the lateral direction, and whereby the trench structures, furthermore, have first inner regions, which are filled with electrically conductive material and contact the buried layer in an electrically conductive manner. The integrated circuit is notable in that the first wall regions of the trench structures completely cut through the buried layer and the second wall regions of the trench structures extend into the buried layer, without cutting it completely. Furthermore, a method for manufacturing such an integrated circuit is disclosed.
机译:公开了一种集成电路,其包括:由有源半导体材料制成的并且沿着掩埋层的第一侧延伸的第一层;以及沟槽结构,该沟槽结构切穿由有源半导体材料制成的层并且具有电介质壁区域,从而电介质壁区域在横向上隔离由有源半导体材料制成的层的电子区域,并且由此,沟槽结构还具有第一内部区域,该第一内部区域填充有导电材料并且以导电方式接触掩埋层。集成电路的显着之处在于,沟槽结构的第一壁区域完全切穿了掩埋层,而沟槽结构的第二壁区域延伸到了掩埋层中,而没有将其完全切割。此外,公开了一种用于制造这种集成电路的方法。

著录项

  • 公开/公告号US7816758B2

    专利类型

  • 公开/公告日2010-10-19

    原文格式PDF

  • 申请/专利权人 VOLKER DUDEK;

    申请/专利号US20060491172

  • 发明设计人 VOLKER DUDEK;

    申请日2006-07-24

  • 分类号H01L27/14;

  • 国家 US

  • 入库时间 2022-08-21 18:52:05

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