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Method and system for automatically calibrating intra-cycle timing relationships for sampling signals for an integrated circuit device

机译:自动校准用于集成电路器件的采样信号的周期内定时关系的方法和系统

摘要

A method for automatically calibrating intra-cycle timing relationships between command signals, data signals, and sampling signals for an integrated circuit device. The method includes generating command signals for accessing an integrated circuit component, accessing data signals for conveying data for the integrated circuit component, and accessing sampling signals for controlling the sampling of the data signals. A phase relationship between the command signals, the data signals, and the sampling signals is automatically adjusted to calibrate operation of the integrated circuit device.
机译:一种自动校准用于集成电路器件的命令信号,数据信号和采样信号之间的周期内定时关系的方法。该方法包括生成用于访问集成电路组件的命令信号,访问用于为集成电路组件传送数据的数据信号,以及访问用于控制数据信号的采样的采样信号。自动调整命令信号,数据信号和采样信号之间的相位关系,以校准集成电路装置的操作。

著录项

  • 公开/公告号US7646835B1

    专利类型

  • 公开/公告日2010-01-12

    原文格式PDF

  • 申请/专利权人 GUILLERMO J. ROZAS;

    申请/专利号US20030716320

  • 发明设计人 GUILLERMO J. ROZAS;

    申请日2003-11-17

  • 分类号H04L7/00;

  • 国家 US

  • 入库时间 2022-08-21 18:50:02

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