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Pattern data verification method for semiconductor device, computer-readable recording medium having pattern data verification program for semiconductor device recorded, and semiconductor device manufacturing method
Pattern data verification method for semiconductor device, computer-readable recording medium having pattern data verification program for semiconductor device recorded, and semiconductor device manufacturing method
A pattern data verification method for a semiconductor device, including extracting, from design data, design data corresponding to an edge portion of a mask pattern to obtain an edge portion of a pattern on a substrate to be processed, when the pattern is obtained on the substrate to be processed by using at least two masks each having the mask pattern corresponding to the design data, setting allowable errors with respect to the extracted design data and the design data which is not extracted, respectively, calculating a pattern formed on the substrate to be processed by using at least one mask by process simulation, and comparing an error between the pattern calculated by the simulation and the design data with the allowable error set for the design data.
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