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SEMICONDUCTOR PACKAGE AND A STACKED PACKAGE USING THE SAME, CAPABLE OF IMPROVING THE ELECTRICAL AND THE PHYSICAL RELIABILITY OF THE STACKED PACKAGE
SEMICONDUCTOR PACKAGE AND A STACKED PACKAGE USING THE SAME, CAPABLE OF IMPROVING THE ELECTRICAL AND THE PHYSICAL RELIABILITY OF THE STACKED PACKAGE
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机译:半导体包装和使用相同包装的包装,能够提高包装的电气和物理可靠性
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摘要
PURPOSE: A semiconductor package and a stacked package using the same are provided to minimize the length of exposed wirings by forming an insulation layer on the upper side of a scribe lane.;CONSTITUTION: A semiconductor chip includes a part of a scribe lane(110b). A plurality of bonding pads(114) is formed on the upper side of the semiconductor chip. A first insulation layer(118) is formed on the semiconductor chip in order to expose the bonding pads. Wirings(120) are arranged on the first insulation layer and are connected to the bonding pads. A second insulation layer(122) exposes a part of the wirings. The edge of the second insulation layer is expanded to the scribe lane.;COPYRIGHT KIPO 2010
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