THROUGH-SILICON-VIAS PROCESSED BY PRESSURE INFILTRATION METHOD OF MOLTEN METALS AND THE CHIP STACK PACKAGES CONSISTED OF THE SAME

摘要

PURPOSE: Through-silicon-vias and a chip stacked package including the same are provided to prevent the generation of voids by pressure-infiltrating tin, solder or tin alloy into via-holes. CONSTITUTION: Via-holes(12) are formed in a semiconductor chip(11) or a silicon interposer by a deep-reactive-ion etching or a laser. An insulation layer is formed on the surface of the via-holes. An under bump metallization layer is formed in the via-holes. A molten metal is infiltrated into the via-holes. The rear side of the semiconductor chip or the silicon interposer is polished to form a through-silicon-via(21).