首页> 外国专利> FINE PATTERN FORMING METHOD OF THE SEMICONDUCTOR DEVICE USING PATTERNING AMONG 4 WHICH EASILY CONTROLS THE SPACE CRITICAL DIMENSION BETWEEN PARTITION THROUGH THE THERMAL OXIDATION TIMING CONTROL

FINE PATTERN FORMING METHOD OF THE SEMICONDUCTOR DEVICE USING PATTERNING AMONG 4 WHICH EASILY CONTROLS THE SPACE CRITICAL DIMENSION BETWEEN PARTITION THROUGH THE THERMAL OXIDATION TIMING CONTROL

机译:通过在热氧化定时控制中容易地控制分区之间的空间临界尺寸的4种模式中的半导体器件的精细图案形成方法

摘要

PURPOSE: A fine pattern forming method of the semiconductor device using patterning among 4 does not apply the spacer patterning to one partition pattern duplication. The solid of pattern and secures the uniformity of the space.;CONSTITUTION: A first party layer is formed on the substrate(20). The lithographically processing about said the first party layer is enforced and the first party pattern(23B) is formed. The oxidation process is enforced and the first sacrificing layer spacer(29A) is formed in said the first party the pattern surface. The second sacrificing layer spacer is evaporated according to the surface of whole structure in which the first sacrificing layer spacer is formed.;COPYRIGHT KIPO 2010
机译:用途:在4种模式中使用图案化的半导体器件的精细图案形成方法不将间隔物图案应用于一个分区图案复制。图案的实心并确保空间的均匀性。组成:第一方层形成在基板(20)上。实施关于所述第一方层的光刻处理,并形成第一方图案(23B)。实施氧化工艺,并在所述第一方图案表面上形成第一牺牲层隔离物(29A)。根据形成第一牺牲层间隔物的整个结构的表面蒸发第二牺牲层间隔物。; COPYRIGHT KIPO 2010

著录项

  • 公开/公告号KR20100079981A

    专利类型

  • 公开/公告日2010-07-08

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20080138590

  • 发明设计人 KIM WON KYU;

    申请日2008-12-31

  • 分类号H01L21/027;

  • 国家 KR

  • 入库时间 2022-08-21 18:32:18

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