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Recessed drain and source areas in combination with advanced silicide formation in transistors
Recessed drain and source areas in combination with advanced silicide formation in transistors
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机译:凹陷的漏极和源极区域与晶体管中高级硅化物的形成相结合
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摘要
During the manufacturing process for forming sophisticated transistor elements, the gate height may be reduced and a recessed drain and source configuration may be obtained in a common etch sequence prior to forming respective metal silicide regions. Since the corresponding sidewall spacer structure may be maintained during the etch sequence, controllability and uniformity of the silicidation process in the gate electrode may be enhanced, thereby obtaining a reduced degree of threshold variability. Furthermore, the recessed drain and source configuration may provide reduced overall series resistance and enhanced stress transfer efficiency.
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