首页> 外国专利> SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF, CAPABLE OF IMPROVING THE GATE RESISTANCE REDUCTION AND GIDL PROPERTY OF A BURIED GATE

SEMICONDUCTOR DEVICE AND A MANUFACTURING METHOD THEREOF, CAPABLE OF IMPROVING THE GATE RESISTANCE REDUCTION AND GIDL PROPERTY OF A BURIED GATE

机译:能够提高埋入式门的门电阻的降低和基德性能的半导体装置及其制造方法

摘要

PURPOSE: A semiconductor device and a manufacturing method thereof are provided to improve the refresh property of a semiconductor device by improving the GIDL(Gate Induced Drain Leakage) property by the void occurring during the deposition of a nitride layer for protecting the gate electrode.;CONSTITUTION: A recess(140) is formed on a semiconductor substrate(100). A first gate electrode(160) is buried within the recess. A side wall spacer is formed on the first gate electrode. A second gate electrode(180) is formed on the first gate electrode including the side wall spacer. A gate protection film(190) is buried within the recess.;COPYRIGHT KIPO 2011
机译:目的:提供一种半导体器件及其制造方法,以通过在用于保护栅电极的氮化物层的沉积过程中产生的空隙来改善GIDL(栅诱导的漏漏)性能,从而改善半导体器件的刷新性能。构成:在半导体衬底(100)上形成凹槽(140)。第一栅电极(160)被掩埋在凹槽内。在第一栅电极上形成侧壁间隔物。在包括侧壁间隔物的第一栅电极上形成第二栅电极(180)。栅极保护膜(190)埋在凹槽内。; COPYRIGHT KIPO 2011

著录项

  • 公开/公告号KR20110012347A

    专利类型

  • 公开/公告日2011-02-09

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20090070035

  • 发明设计人 LEE SANG HO;

    申请日2009-07-30

  • 分类号H01L21/335;

  • 国家 KR

  • 入库时间 2022-08-21 17:52:37

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