首页> 外国专利> METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE EQUIPPED WITH A BURIED GATE CAPABLE OF IMPROVING A REFRESH PROPERTY BY REDUCING THE CAPACITANCE OF ENTIRE CELLS

METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE EQUIPPED WITH A BURIED GATE CAPABLE OF IMPROVING A REFRESH PROPERTY BY REDUCING THE CAPACITANCE OF ENTIRE CELLS

机译:制造具有通过降低整个单元格的容量来提高刷新性能的潜入式门的半导体设备的方法

摘要

PURPOSE: A method for manufacturing a semiconductor device equipped with a buried gate is provided to prevent defects due to the stepped part between a cell region and a core/peripheral region by previously forming a gate conductive film in the peripheral region before a bit-line contact is formed in the cell region.;CONSTITUTION: An element isolation film(13) defining a cell region and a peripheral region is formed on the upper side of a substrate(11). A buried gate(18) is formed in the cell region. A sealing film(19) sealing the upper side of the buried gate is formed. A gate oxide film(20) and a gate conductive film(21) are successively formed on the upper side of the cell region and the peripheral region. A photosensitive pattern(22) is formed to open the cell region using a cell region opening mask.;COPYRIGHT KIPO 2011
机译:目的:提供一种用于制造具有掩埋栅极的半导体器件的方法,以通过在位线之前在外围区域中预先形成栅极导电膜来防止由于单元区域与芯/外围区域之间的阶梯状部分引起的缺陷。组成:构成:在衬底(11)的上侧上形成限定单元区域和外围区域的元件隔离膜(13)。在单元区域中形成掩埋栅(18)。形成密封掩埋栅极的上侧的密封膜(19)。在单元区域和周边区域的上​​侧依次形成栅极氧化膜(20)和栅极导电膜(21)。形成感光图案(22)以使用单元区域开口掩模来打开单元区域。; COPYRIGHT KIPO 2011

著录项

  • 公开/公告号KR20110064963A

    专利类型

  • 公开/公告日2011-06-15

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20090121765

  • 发明设计人 KIM YOUNG DEUK;

    申请日2009-12-09

  • 分类号H01L21/336;H01L29/78;

  • 国家 KR

  • 入库时间 2022-08-21 17:51:42

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