Reducing path delay sensitivity to temperature variation in timing-critical paths

摘要

A method for reducing path delay sensitivity to temperature variation in a circuit is provided. The method includes the steps of: identifying at least one timing-critical path in the circuit, the path including a plurality of circuit cells coupled between an input and an output of the path; determining a temperature slope coefficient of the path; when the slope coefficient is negative, increasing the slope coefficient by controlling at least one characteristic of at least one of the cells in the path; and when the slope coefficient is positive, decreasing the slope coefficient by controlling at least one characteristic of at least one of the cells in the path.