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Method of creating photolithographic masks for semiconductor device features with reduced design rule violations

机译:为半导体器件特征创建光刻掩模的方法,减少了违反设计规则的行为

摘要

A method of creating photolithographic masks for semiconductor device features with reduced design rule violations is provided. The method begins by providing preliminary data that represents an overall mask pattern. The preliminary data is processed to decompose the overall mask pattern into a plurality of component mask patterns. Next, a design rule check is performed on the plurality of component mask patterns to identify tip-to-tip and tip-to-line violations in the plurality of component mask patterns. The method continues by modifying at least one of the plurality of component mask patterns in accordance with the identified violations to obtain a modified set of component mask patterns, wherein each mask pattern in the modified set of component mask patterns is void of tip-to-tip and tip-to-line violations. Photolithographic masks are then created for the modified set of component mask patterns.
机译:提供了一种为半导体器件特征创建光刻掩模的方法,其具有减少的设计规则违规。该方法开始于提供代表总体掩模图案的初步数据。初步数据被处理以将整个掩模图案分解成多个分量掩模图案。接下来,对多个组件掩模图案执行设计规则检查,以识别多个组件掩模图案中的点对点和点对线违规。该方法通过根据所识别的违规修改多个组件掩模图案中的至少一个来继续以获得修改的组件掩模图案集,其中修改后的组件掩模图案集中的每个掩模图案没有尖端到尖端。提示和提示到线的违规。然后为组件掩模图案的修改集创建光刻掩模。

著录项

  • 公开/公告号US8219939B2

    专利类型

  • 公开/公告日2012-07-10

    原文格式PDF

  • 申请/专利权人 RICHARD SCHULTZ;JAMES PATTISON;

    申请/专利号US20090617421

  • 发明设计人 RICHARD SCHULTZ;JAMES PATTISON;

    申请日2009-11-12

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 17:26:36

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