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Vertical-channel junction field-effect transistors having buried gates and methods of making
Vertical-channel junction field-effect transistors having buried gates and methods of making
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机译:具有掩埋栅的垂直沟道结型场效应晶体管及其制造方法
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摘要
Semiconductor devices and methods of making the devices are described. The devicescan be implemented in SiC and can include expitaxially grown n-type drift andp-type trenched gate regions, and an n-type epitaxially regrown channel regionon top of the trenched p-gate regions. A source region can be epitaxially regrownon top of the channel region or selectively implanted into the channel region.Ohmic contacts to the source, gate and drain regions can then be formed. The devicescan include edge termination structures such as guard rings, junction terminationextensions (JTE), or other suitable p-n blocking structures. The devices canbe fabricated with different threshold voltages, and can be implemented forboth depletion and enhanced modes of operation for the same channel doping. Thedevices can be used as discrete power transistors and in digital, analog, andmonolithic microwave integrated circuits.
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