With a carrier copper foil, a manufacturing method of a copper foil with a carrier, a printed circuit board, printed circuit boards, copper-clad laminate, and a method for manufacturing a printed wiring board

摘要

[PROBLEMS] While a high adhesion between the carrier and the ultra-thin copper layer before the step of laminating the insulating substrate, the adhesion between the carrier and the ultra-thin copper layer is lowered after the step of laminating the insulating substrate, and the carrier / electrode can be easily peeled off with a thin copper layer interface, and to provide a copper foil with carrier pinholes is favorably suppressed in the ultra-thin copper layer surface. When it was peeled thin copper interlayer electrode interlayer / A1 A with carrier copper foil depth direction obtained from the analysis in the depth direction from the surface by XPS: atomic concentration of chromium (x units of nm) The e (x) and (percent), and f (x) and atomic concentration of zinc (%), and g (x) and atomic concentration of nickel (%), h (x) atomic concentration of copper (%) In and, the i (x) and the total atomic concentration of oxygen (%), it is j (x) and the atomic concentration of carbon (%), and k (x) and the atomic concentration of the other (%), from the intermediate layer surface interval of depth analysis of in [0,1.0], ∫e (x) dx / (∫e (x) dx + ∫f (x) dx + ∫g (x) dx + ∫h (x) 1~30% dx + ∫i (x) dx + ∫j (x) dx + ∫k is (x) dx), ∫f (x) dx / (∫e (x) dx + ∫f (x) dx + 0.1~5% ∫g (x) dx + ∫h (x) dx + ∫i (x) dx + ∫j (x) dx + ∫k is (x) dx), ∫g (x) dx / ( ∫e (x) dx + ∫f (x) dx + ∫g (x) dx + ∫h (x) dx + ∫i (x) dx + ∫j (x) dx + ∫k (x) dx) 1 and 50%, in [1.0,4.0], ∫g (x) dx / (∫e (x) dx + ∫f (x) dx + ∫g (x) dx + ∫h (x) dx + ∫i (x) dx + ∫j (x) dx + ∫k (x) dx) satisfies more than 40%. [Selection Figure] Figure 1