首页> 外国专利> Stacked structure of semiconductor packages including through-silicon via and inter-package connector, and method of fabricating the same

Stacked structure of semiconductor packages including through-silicon via and inter-package connector, and method of fabricating the same

机译:包括硅通孔和封装间连接器的半导体封装的堆叠结构及其制造方法

摘要

A stacked structure of semiconductor packages includes an upper semiconductor package, a lower semiconductor package and inter-package connectors. The upper semiconductor package includes an upper package substrate, a plurality of upper semiconductor chips stacked on the upper package substrate, and conductive upper connection lands formed on a bottom surface of the upper package substrate. The lower semiconductor package includes a lower package substrate, a plurality of lower semiconductor chips stacked on the lower package substrate, and lower through-silicon vias vertically penetrating the lower semiconductor chips. The inter-package connectors may electrically connect the through-silicon vias to the upper connection lands.
机译:半导体封装的堆叠结构包括上部半导体封装,下部半导体封装和封装间连接器。上半导体封装件包括上封装基板,堆叠在上封装基板上的多个上半导体芯片以及形成在上封装基板的底表面上的导电上连接焊盘。下部半导体封装件包括下部封装件基板,堆叠在下部封装件基板上的多个下部半导体芯片以及垂直穿透下部半导体芯片的下部贯穿硅通孔。封装间连接器可将硅通孔电连接到上部连接焊盘。

著录项

  • 公开/公告号US8436455B2

    专利类型

  • 公开/公告日2013-05-07

    原文格式PDF

  • 申请/专利权人 HYUNG-LAE EUN;

    申请/专利号US20100900968

  • 发明设计人 HYUNG-LAE EUN;

    申请日2010-10-08

  • 分类号H01L23/02;

  • 国家 US

  • 入库时间 2022-08-21 16:43:08

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号