首页> 外国专利> SEMICONDUCTOR TEST JIG AND A METHOD FOR MEASURING A BREAKDOWN VOLTAGE USING THE SAME, WHICH IS APPROPRIATE FOR MEASURING A BREAKDOWN VOLTAGE OF A WIDE BANDGAP SEMICONDUCTOR

SEMICONDUCTOR TEST JIG AND A METHOD FOR MEASURING A BREAKDOWN VOLTAGE USING THE SAME, WHICH IS APPROPRIATE FOR MEASURING A BREAKDOWN VOLTAGE OF A WIDE BANDGAP SEMICONDUCTOR

机译:半导体测试夹具和使用相同方法测量击穿电压的方法,适用于测量宽禁带半导体的击穿电压

摘要

PURPOSE: A semiconductor test jig and a method for measuring a breakdown voltage using the same are provided to perform breakdown voltage measurement of a semiconductor chip in a low cost without atmospheric discharge.;CONSTITUTION: A susceptor(1) has a probe pin(3) and an insulator(2). The insulator is installed to surround the probe pin. A bottom electrode stage(7) is arranged on a plane where the probe pin and the insulator of the susceptor are installed, and a semiconductor chip(4) is mounted on the plane of the susceptor. The probe pin contacts a surface electrode(5) formed in the semiconductor chip, and the insulator contacts the semiconductor chip and both sides of the bottom electrode stage at the same time. A surface electrode is formed on the surface of the semiconductor chip and a protection film(6) is formed at a termination part.;COPYRIGHT KIPO 2013
机译:目的:提供一种半导体测试夹具和使用该测试夹具测量击穿电压的方法,以低成本进行半导体芯片的击穿电压测量而无大气放电。;构成:基座(1)具有探针(3) )和绝缘子(2)。绝缘体安装在探针周围。底部电极台(7)布置在安装有探针和基座的绝缘体的平面上,并且半导体芯片(4)安装在基座的平面上。探针接触形成在半导体芯片中的表面电极(5),并且绝缘体同时接触半导体芯片和底部电极台的两侧。在半导体芯片的表面上形成表面电极,并在终端部分形成保护膜(6)。; COPYRIGHT KIPO 2013

著录项

  • 公开/公告号KR20130048157A

    专利类型

  • 公开/公告日2013-05-09

    原文格式PDF

  • 申请/专利权人 MITSUBISHI ELECTRIC CORPORATION;

    申请/专利号KR20120118843

  • 发明设计人 IKEGAMI MASAAKI;

    申请日2012-10-25

  • 分类号G01R31/12;G01R19/00;

  • 国家 KR

  • 入库时间 2022-08-21 16:27:08

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