SEMICONDUCTOR DEVICE CAPABLE OF SHORTENING AN ERASING OPERATION TIME, AND AN OPERATING METHOD THEREOF

摘要

PURPOSE: A semiconductor device, and an erasing method thereof are provided to increase the number of cycling by increasing a sensing reference level of an erasing test operation, thereby improving reliability of a semiconductor device whose electrical characteristic is degraded.;CONSTITUTION: A memory cell block comprises multiple memory cells. Peripheral circuits apply erasing voltages to the memory cells while an erasing operation. The peripheral circuits detects non-erased cells by sensing the voltage change of bit lines by the erasing test voltage which is applied to word lines of the memory cells. A control circuit (120) controls the peripheral circuits to re-implement the erasing test operation by changing a sensing reference level for deciding the voltage change of the bit lines in case non-erased cells are detected.;COPYRIGHT KIPO 2013;[Reference numerals] (110) Memory cell array; (120) Control circuit; (130) Voltage generation circuit; (140) Low decoder; (150) Page buffer group; (160) Column selection circuit; (170) Input/output circuit; (180) Pass/fail determining circuit; (AA) Input/output control signal