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Method of manufacturing a CMOS device, and it was improved stress having a channel region is applied (method of forming a semiconductor device and the semiconductor device)

机译:制造CMOS器件的方法,并施加具有沟道区的应力得到改善(形成半导体器件的方法和该半导体器件)

摘要

Be generated (ie, tensile and compressive) stresses with present invention relates to the same stress-inducing material, different p-FET and in the n-FET, to increase the hole mobility and electron mobility of each internally. Complementary metal oxide semiconductor which has been improved with a channel region stressed A1 The present invention relates to (CMOS) devices. More specifically, CMOS devices are improved each comprises a field effect transistor (FET) having a channel region disposed in a semiconductor device structure, a semiconductor device structure, equivalent crystal planes of the first set of and an additional surfaces of one or more a top surface that is oriented along one of the, is oriented along the equivalent crystal planes of the different sets of second. These additional surfaces can be easily formed by crystallographic etching. Furthermore, as the stressor layers is, and is disposed on the surface of the additional semiconductor device structure or one having a tensile stress or intrinsic compressive stress is applied compressive stress or tensile stress to the channel region of the FET is placed, composed. Such stressor layer may be formed by pseudomorphic growth of semiconductor material having a lattice constant different from the semiconductor device structure. [Selection Figure Figure 5
机译:用本发明产生的应力(即拉伸应力和压缩应力)涉及相同的应力诱导材料,不同的p-FET和在n-FET中,以增加内部的空穴迁移率和电子迁移率。用沟道区域应力为A1改进的互补金属氧化物半导体技术领域本发明涉及(CMOS)器件。更具体地,对CMOS器件进行了改进,每个CMOS器件包括具有布置在半导体器件结构中的沟道区,半导体器件结构,第一组的等效晶面以及一个或多个顶部的附加表面的场效应晶体管(FET)。沿着其中一个取向的表面沿着不同组的第二晶体的等效晶面取向。这些另外的表面可以通过晶体学蚀刻容易地形成。此外,由于应力层是并设置在附加的半导体器件结构的表面上,或者将具有拉应力或固有压应力的应力层施加到FET的沟道区上,从而构成应力层。这样的应力源层可以通过具有与半导体器件结构不同的晶格常数的半导体材料的假晶生长来形成。 [选择图图5

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