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Layout Circuit Optimization For Deep Submicron Technologies
Layout Circuit Optimization For Deep Submicron Technologies
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机译:深亚微米技术的布局电路优化
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摘要
An integrated circuit is disclosed that has substantially continuous active diffusion regions within its diffusion layers. Active regions of semiconductor devices can be fabricated using portions of these substantially continuous active diffusion regions. Stress can be applied to these semiconductor devices during their fabrication which leads to substantially uniform stress patterns throughout the integrated circuit. The substantially uniform stress patterns can significantly improve performance of the integrated circuit.
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