Method for manufacturing a power device being integrated on a semiconductor substrate, in particular having a field plate vertical structure and corresponding device

摘要

An embodiment of a power device comprising and formation of at least one gate region, of at least one buried source region, of at least one body region and of at least one source region; at least one body/source contact and at least one buried source contact; and formation of a source contact region and of a gate contact region through deposition. An embodiment of the method also comprises formation of the at least one gate region and of the at least one buried source region, electrically insulated, through a single deposition of a conductive filling material on an epitaxial layer, on vertical walls of the trench and within the empty region; and through etching of the conductive filling material forming a first spacer and a second spacer, suitable for serving as a gate electrode and forming a buried source electrode within the empty region.