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Enhanced transistor performance of N-channel transistors by using an additional layer above a dual stress liner in a semiconductor device
Enhanced transistor performance of N-channel transistors by using an additional layer above a dual stress liner in a semiconductor device
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机译:通过在半导体器件中的双应力衬垫上方使用附加层来增强N沟道晶体管的晶体管性能
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摘要
By forming an additional dielectric material, such as silicon nitride, after patterning dielectric liners of different intrinsic stress, a significant increase of performance of N-channel transistors may be obtained while substantially not contributing to a performance loss of the P-channel transistor.
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