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Independently voltage controlled volume of silicon on a silicon on insulator chip

机译:绝缘体芯片上硅上硅的电压独立控制

摘要

A semiconductor chip (100) has an independently voltage controlled silicon region (110) that is a circuit element useful for controlling capacitor values of eDRAM trench capacitors (140) and threshold voltages of field effect transistors (130) overlying the independently voltage controlled silicon region (110). A bottom, or floor, of the independently voltage controlled silicon region (110) is a deep implant (105) of opposite doping to a doping of a substrate of the independently voltage controlled silicon region (110). A top, or ceiling, of the independently voltage controlled silicon region (110) is a buried oxide (103) implant in the substrate. Sides of the independently voltage controlled silicon region are deep trench isolation (106). Voltage of the independently voltage controlled silicon region (110) is applied through a contact structure (107) formed through the buried oxide (103).
机译:半导体芯片(100)具有独立电压控制的硅​​区域(110),其是用于控制eDRAM沟槽电容器(140)的电容器值和覆盖独立电压控制的硅​​区域的场效应晶体管(130)的阈值电压的电路元件。 (110)。独立电压控制的硅​​区域(110)的底部或底部是与独立电压控制的硅​​区域(110)的衬底的掺杂相反的掺杂的深注入(105)。独立电压控制的硅​​区域(110)的顶部或顶部是在衬底中的掩埋氧化物(103)注入物。独立的电压控制的硅​​区域的侧面是深沟槽隔离(106)。通过通过掩埋氧化物(103)形成的接触结构(107)施加独立电压控制的硅​​区域(110)的电压。

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