首页> 外国专利> DESIGN METHOD OF WIRING LAYOUT, SEMICONDUCTOR DEVICE, PROGRAM FOR SUPPORTING DESIGN OF WIRING LAYOUT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

DESIGN METHOD OF WIRING LAYOUT, SEMICONDUCTOR DEVICE, PROGRAM FOR SUPPORTING DESIGN OF WIRING LAYOUT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

机译:布线布局的设计方法,半导体器件,用于支持布线布局的设计的程序以及制造半导体器件的方法

摘要

According to one embodiment, a design method of layout formed by a sidewall method is provided. The method includes: preparing a base pattern on which a plurality of first patterns extending in a first direction and arranged at a first space in a second direction intersecting the first direction and a plurality of second patterns extending in the first direction and arranged at a center between the first patterns, respectively, are provided; and drawing a connecting portion which extends in the second direction and connects two neighboring first patterns sandwiching one of the second patterns, and separating the one of the second patterns into two patterns not contacting the connecting portion.
机译:根据一个实施例,提供了一种通过侧壁方法形成的布局的设计方法。该方法包括:准备基础图案,在该基础图案上,多个第一图案在第一方向上延伸并且布置在与第一方向相交的第二方向上的第一空间处,以及多个第二图案在第一方向上延伸并且布置在中心处。在第一图案之间分别提供;绘制连接部分,该连接部分在第二方向上延伸并连接将两个第二图案之一夹在中间的两个相邻的第一图案,并将其中一个第二图案分成不与连接部分接触的两个图案。

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