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SYSTEMS AND METHODS FOR CMOS-INTEGRATED JUNCTION FIELD EFFECT TRANSISTORS FOR DENSE AND LOW-NOISE BIOELECTRONIC PLATFORMS
SYSTEMS AND METHODS FOR CMOS-INTEGRATED JUNCTION FIELD EFFECT TRANSISTORS FOR DENSE AND LOW-NOISE BIOELECTRONIC PLATFORMS
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机译:用于密集和低噪声生物电子平台的CMOS集成结场效应晶体管的系统和方法
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摘要
A complementary metal oxide semiconductor (CMOS)-integrated junction field effect transistor (JFET) has reduced scale and reduced noise. An exemplary JFET has a substrate layer of one dopant type with a gate layer of that dopant type disposed on the substrate, a depletion channel of a second dopant type disposed on the first gate layer, and a second gate layer of the first dopant type disposed on the depletion channel and proximate a surface of the transistor. The second gate layer can separate the depletion channel from the surface, and the depletion channel separates the first gate layer from the second gate layer.
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