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Static random access memories (SRAM) with read-preferred cell structures, write drivers, related systems, and methods

机译:具有读取优先单元结构,写入驱动器,相关系统和方法的静态随机存取存储器(SRAM)

摘要

Static random access memories (SRAM) with read-preferred cell structures and write drivers are disclosed. In one embodiment, the SRAM has a six transistor bit cell. The read-preferred bit cell is implemented by providing two inverters, each having a pull up transistor, a pull down transistor and a pass gate transistor. Each pull up transistor is associated with a feedback loop. The feedback loop improves random static noise margin. Each transistor has a width and a length. The lengths of the pass gate transistors are increased. The widths of the pull down transistors are equal to one another and also equal to the widths of the pass gate transistors. The widths of the pass gate and pull down transistors may also be increased relative to prior designs. A write assist circuit may also be used to improve performance.
机译:公开了具有读取优先单元结构和写入驱动器的静态随机存取存储器(SRAM)。在一实施例中,SRAM具有六个晶体管位单元。通过提供两个反相器来实现读取优先位单元,每个反相器具有上拉晶体管,下拉晶体管和传输门晶体管。每个上拉晶体管与一个反馈环路相关联。反馈环路改善了随机静态噪声容限。每个晶体管具有宽度和长度。传输门晶体管的长度增加。下拉晶体管的宽度彼此相等,并且也等于传输门晶体管的宽度。相对于现有设计,传输门和下拉晶体管的宽度也可以增加。写辅助电路也可以用于改善性能。

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